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 150mA Ultra Low Dropout Regulator with Low Noise Bypass
POWER MANAGEMENT Description
The SC1453 is a low dropout linear regulator that operates from a +2.25V to +6.5V input range and delivers up to 150mA. A PMOS pass transistor allows the low 75A supply current to remain independent of load, making these devices ideal for battery operated portable equipment such as cellular phones, cordless phones and personal digital assistants. The SC1453 has a bandgap reference bypass pin for very low noise operation - a 10nF (typ.) capacitor may be connected between this pin and ground. Other features include low powered shutdown, short circuit protection, thermal shutdown protection and reverse battery protection. The SC1453 comes in the tiny 5 lead SOT-23 package and the ultra-low profile 5 lead TSOT-23.
SC1453
Features
"2982/5205" compatible pinout Guaranteed 150 mA output current 2% output accuracy guaranteed over line, load and temperature Very small external components - designed to work with ceramic capacitors Low 26VRMS output noise (1.5V option, CIN = COUT = 1F, CBYP = 10nF) Very low supply current Thermal overload protection Reverse battery protection Low power shutdown Full industrial temperature range Very low profile packaging available (1mm max. height) Surface mount packaging (5 pin SOT-23 and TSOT-23) Available in Lead-free packages, fully WEEE and RoHS compliant
Applications
Battery Powered Systems Cellular Telephones Cordless Telephones Personal Digital Assistants Portable Instrumentation Modems PCMCIA cards
Typical Application Circuit
VIN C1 1uF
1 3
U1 IN EN
SC1453 OUT GND BYP 2
5 4
VOUT C3 1uF C2 10nF
Revision: August 24, 2006
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SC1453
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Input Supply Voltage Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 Sec. ESD Rating
Symbol VIN J A J C TA TJ TSTG TLEAD ESD
Maximum -0.6 to +7 256 81 -40 to +85 -40 to +125 -65 to 150 300 2
Units V C/W C/W C C C C kV
Electrical Characteristics
Unless specified: VIN = VOUT + 1V, VEN = VIN, IOUT = 100A, CIN = COUT = 1F, TA = 25C. Values in bold apply over full operating ambient temperature range.
Parameter IN Supply Voltage Range Supply Current
Symbol
Conditions
Min
Typ
Max
Units
VIN IQ IOUT = 0mA to150mA
2.25 75
6.50 130 160
V A
VIN = 6.5V, VEN = 0V
0.1
1.0 1.5
A
OUT Output Voltage (1) VOUT IOUT = 1mA 0mA IOUT 150mA, VOUT +1V VIN 5.5V Line Regulation (1)(2) REG(LINE) (VOUT(NOM) + 0.1V) VIN 5.5V, IOUT = 1mA -1.5% -2.0% 2.5 VOUT +1.5% +2.0% 10 12 Load Regulation (1) REG(LOAD) IOUT = 0.1mA to 150mA -3 -10 -20 mV mV V
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SC1453
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: VIN = VOUT + 1V, VEN = VIN, IOUT = 100A, CIN = COUT = 1F, TA = 25C. Values in bold apply over full operating ambient temperature range.
Parameter OUT (Cont.) Current Limit Dropout Voltage(1)(3)
Symbol
Conditions
Min
Typ
Max
Units
ILIM VD IOUT = 1mA IOUT = 50mA
400 1 50 65 75 IOUT = 100mA 100 125 155 IOUT = 150mA 150 190 230
mA mV mV
mV
mV
Output Voltage Noise, COUT = 1F
en
10Hz to 100kHz, IOUT = 1mA CBYP = 10nF, VOUT = 1.5V 10Hz to 100kHz, IOUT = 1mA CBYP = 10nF, VOUT = 3.3V
26 54 13 29 61
VRMS
Output Voltage Noise, COUT = 100F
en
10Hz to 100kHz, IOUT = 1mA CBYP = 10nF, VOUT = 1.5V 10Hz to 100kHz, IOUT = 1mA CBYP = 10nF, VOUT = 3.3V
VRMS
Power Supply Rejection Ratio BYP Start-up Rise Time EN Enable Input Threshold
PSRR
f = 120Hz, CBYP = 10nF
dB
tr
CBYP = 10nF
1.3
ms
VIH VIL
2.25V VIN 6.5V 2.25V VIN 6.5V 0V VEN VIN
1.6 0.4 -0.5 0 +0.5
V
Enable Input Bias Current (4) Over Temperature Protection High Trip Level Hysteresis
IEN
A
THI THYST
150 20
C C
Notes: (1) Low duty cycle pulse testing with Kelvin connections required. (2) VIN(MIN) = 2.25V. (3) Defined as the input to output differential at which the output voltage drops 100mV below the value measured at a differential of 1V. Not measurable on 1.5V and 1.8V parts due to minimum VIN constraints. (4) Guaranteed by design.
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SC1453
POWER MANAGEMENT Pin Configuration
Top View
Ordering Information
Part Number SC1453ISK-XXXTR (1)(2) SC1453ISK-XXXTRT (1)(2)(3) SC1453ISK285TRT(2)(4) SC1453ITSK-XXXTR(1)(2) SC1453ITSK-XXXTRT (1)(2)(3) SC1453TSK285TRT(2)(4) S C 1453E V B
(5)
P ackag e SOT-23-5
TSOT-23-5
N/A
(SOT-23-5 & TSOT-23-5)
Notes: (1) Where XXX denotes voltage options. Available voltages are: 1.5V (1.5), 1.8V (1.8), 2.5V (2.5), 2.7V (2.7), 2.8V (2.8), 2.9V (2.9), 3.0V (3.0), 3.1V (3.1), 3.2V (3.2) and 3.3V (3.3). (2) Only available in tape and reel packaging. A reel contains 3000 devices. (3) Lead free packaging (ordered with suffix extension "TRT") is optional. Consult factory for availability. This product is fully WEEE and RoHS compliant. (4) Use when ordering SC1453, 2.85V option, available in Lead-free packages only. This product is fully WEEE and RoHS compliant. (5) Evaluation board for SC1453. Specify output voltage option when ordering.
Pin Descriptions
Pin # 1 2 3 4 5 Pin Name IN GND EN BYP OUT Pin Function Input pin. Ground pin. Can be used for heatsinking if needed. Active high enable pin. Connect to IN if not being used. Reference bypass. Connect a 10nF capacitor (typical) between this pin and GND to reduce output noise. Regulator output, sourcing up to 150mA.
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SC1453
POWER MANAGEMENT Marking Information
Top Mark Bottom Mark
x3XX
x = package (5 for SOT-23-5, T for TSOT-23-5) 3 = SC1453 XX = voltage option (examples: 5331 for 3.1V option in SOT-23-5
yyww
yyww = Date code (example: 0008 for week 8 of 2000)
Top Mark
Bottom Mark
BX00
For SC1453, 2.85V option: X = L for SOT-23-5 and N for TSOT-23-5
yyww
yyww = Date code (example: 0008 for week 8 of 2000)
Block Diagram
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SC1453
POWER MANAGEMENT Applications Information
Theory Of Operation The SC1453 is intended for applications where very low dropout voltage, low supply current and low output noise are critical. It provides a very simple, low cost solution that uses very little pcb real estate. Only three external capacitors are required for operation (two if a low noise output is not required). The SC1453 contains a bandgap reference trimmed for optimal temperature coefficient which is fed into the inverting input of an error amplifier. The output voltage of the regulator is divided down internally using a resistor divider and compared to the bandgap voltage. The error amplifier drives the gate of a low R DS(ON) P-channel MOSFET pass device. An active high enable pin (EN) allows the regulator to be shut down. Pulling this pin low causes the device to enter a very low power shutdown mode, where it will draw typically 0.1A from the input supply. A bypass pin (BYP) is provided to decouple the bandgap reference to reduce output noise and also to improve power supply rejection. This pin can be left open if low noise operation is not required. The regulator has its own current limit circuitry to ensure that the output current will not damage the device during output short, overload or start-up. The current limit is guaranteed to be greater than 400mA to allow fast charging of the output capacitor and high initial currents for DSP initialization. The SC1453 has a fast start-up circuit to speed up the initial charging time of the bypass capacitor to enable the output voltage to come up quicker (typically 1.3ms with CBYP = 10nF). The SC1453 includes thermal shutdown circuitry to turn off the device if TJ exceeds 150C (typical), with the device remaining off until TJ drops by 20C (typical). Reverse battery protection circuitry ensures that the device cannot be damaged if the input supply is accidentally reversed, limiting the reverse current to less than 1.5mA. Component Selection - General Output capacitor - Semtech recommends a minimum capacitance of 1F at the output with an equivalent series resistance (ESR) of < 1 over temperature. While the SC1453 has been designed to be used with ceramic capacitors, it does not have to be used with ceramic capacitors, allowing the designer a choice. Increasing the bulk capacitance will further reduce output noise and improve the overall transient response. Input capacitor - Semtech recommends the use of a 1F ceramic capacitor at the input. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving overall load transient response. Bypass capacitor - Semtech recommends the use of a 10nF ceramic capacitor to bypass the bandgap reference. Increasing this capacitor to 100nF will further improve power supply rejection and overall output noise. CBYP may be omitted if low noise operation is not required. Thermal Considerations The worst-case power dissipation for this part is given by:
PD(MAX ) = (VIN(MAX) - VOUT(MIN) )* IOUT(MAX ) + VIN(MAX ) * IQ(MAX )
(1)
For all practical purposes, equation (1) can be reduced to the following expression:
PD(MAX) = (VIN(MAX ) - VOUT(MIN) )* IOUT(MAX)
(2)
Looking at a typical application, 3.3V to 2.8V at 150mA: VIN(MAX) = 3.3 + 5% = 3.465V VOUT(MIN) = 2.8V - 2% = 2.744V IOUT = 150mA TA = 85C
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SC1453
POWER MANAGEMENT Applications Information (Cont.)
Inserting these values into equation (2) gives us:
PD(MAX ) = (3.465 - 2.744 ) * 0.150 = 108mW
Layout Considerations While layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. 1) Attaching the part to a larger copper footprint will enable better heat transfer from the device, especially on PCBs where there are internal ground and power planes. 2) Place the input, output and bypass capacitors close to the device for optimal transient response and device behaviour. 3) Connect all ground connections directly to the ground plane. If there is no ground plane, connect to a common local ground point before connecting to board ground.
Using this figure, we can calculate the maximum thermal impedance allowable to maintain TJ 125C:
JA (MAX ) =
(T
J(MAX )
- TA (MAX ) )
PD(MAX )
=
(125 - 85) = 370C / W
0.108
With the standard SOT-23-5/TSOT-23-5 Land Pattern shown at the end of this datasheet, and minimum trace widths, the thermal impedance junction to ambient for SC1453ISK is 256C/W. Thus no additional heatsinking is required for this example. The junction temperature can be reduced further (or higher power dissipation can be allowed) by the use of larger trace widths and connecting PCB copper to the GND pin (pin 2), which connects directly to the device substrate. Adding approximately one square inch of PCB copper to pin 2 will reduce JA to approximately 130C/W and T J(MAX) for the example above to approximately 100C for the SOT-23-5 package. The use of multi layer boards with internal ground/power planes will lower the junction temperature and improve overall output voltage accuracy.
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SC1453
POWER MANAGEMENT Typical Characteristics
Quiescent Current vs. Junction Temperature vs. Input Voltage
120 IOUT = 150mA 100 80 IQ (A) VIN = 3.8V 60 40 20 0 -50 -25 0 25 TJ (C) 50 75 100 125 IQ(OFF) (nA) VIN = 6.5V 200 175 150 125 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125
Off-State Quiescent Current vs. Junction Temperature
VIN = 6.5V VEN = 0V
Output Voltage vs. Junction Temperature vs. Output Current
0.00 IOUT = 1mA -0.05 VOUT Deviation (%) -0.10 -0.15 100mA IOUT 150mA -0.20 -0.25 VIN = VOUT + 1V -0.30 -50 -25 0 25 TJ (C) 50 75 100 125 0 10 8 6 4 2 12
Line Regulation vs. Junction Temperature vs. Input Voltage Change
IOUT = 1mA
REGLINE (mV)
IOUT = 50mA
VIN = VOUT + 1V to 6.5V
VIN = VOUT + 1V to 5.5V
-50
-25
0
25 TJ (C)
50
75
100
125
Load Regulation vs. Junction Temperature
10 9 8 7 REGLOAD (mV) ILIM (A) 6 5 4 3 2 1 0 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = VOUT + 1V IOUT = 0.1mA to 150mA 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40
Current Limit vs. Junction Temperature vs. Input Voltage
VIN = 6.5V
VIN = 3.8V
-50
-25
0
25 TJ (C)
50
75
100
125
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SC1453
POWER MANAGEMENT Typical Characteristics (Cont.)
Dropout Voltage vs. Junction Temperature vs. Output Current
200 175 150 125 VD (mV) 100 75 50 25 0 -50 -25 0 25 TJ (C) 50 75 100 125 IOUT = 50mA VD (mV) IOUT = 150mA 200 175 150 125 100 75 50 25 0 0 25 50 75 IOUT (mA) 100 125 150 Top to bottom: TJ = 125C TJ = 25C TJ = -40C
Dropout Voltage vs. Output Current vs. Junction Temperature
Bypass Start-up Rise Time vs. Junction Temperature vs. Input Voltage
1.8 1.7 1.6 1.5 tr (ms) 1.4 1.3 1.2 1.1 1.0 0.9 0.8 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = 6.5V VIN = 3.8V VEN (V) CBYP = 10nF
Enable Input Threshold Voltage vs. Junction Temperature vs. Input Voltage
1.6 1.4 1.2 1.0 0.8 VIL @ VIN = 3.8V 0.6 0.4 -50 -25 0 25 TJ (C) 50 75 100 125
VIH @ VIN = 6.5V VIH @ VIN = 3.8V
VIL @ VIN = 6.5V
Reverse Battery Protection vs. Junction Temperature
5.0 4.5 4.0 3.5 I(REV BAT) (mA) en (V/Hz) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -50 -25 0 25 TJ (C) 50 75 100 125 VIN = VEN = -6.5V
Output Spectral Noise Density vs. Frequency vs. Output Voltage, COUT = 1F
10 VIN = VOUT + 1V IOUT = 1mA CIN = 1F CBYP = 10nF TJ = 25C
1
0.1
0.01
Top to bottom: VOUT = 3.3V VOUT = 3.0V VOUT = 2.8V VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V 0.1 1 f (kHz) 10 100 1000
0.001 0.01
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SC1453
POWER MANAGEMENT Typical Characteristics (Cont.)
Output Spectral Noise Density vs. Frequency vs. Output Voltage, COUT = 100F
10 VIN = VOUT + 1V IOUT = 1mA CIN = 1F CBYP = 10nF TJ = 25C en (V/Hz) Top to bottom: VOUT = 3.3V VOUT = 3.0V VOUT = 2.8V VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V 0.1 1 f (kHz) 10 100 1000 10 Left to right: COUT = 100F COUT = 44F COUT = 22F COUT = 10F COUT = 1F
Output Spectral Noise Density vs. Frequency vs. Output Capacitance
1 en (V/Hz)
1
0.1
0.1 VOUT = 1.5V VIN = 2.5V IOUT = 1mA CBYP = 10nF CIN = 1F TJ = 25C 0.1 1 f (kHz) 10 100 1000
0.01
0.01
0.001 0.01
0.001 0.01
Output Spectral Noise Density vs. Frequency vs. Bypass Capacitance
10 CBYP = 1nF CBYP = 10nF CBYP = 100nF CBYP = 1F en (V/Hz)
Output Spectral Noise Density vs. Frequency vs. Output Current
10 Top to bottom: IOUT = 150mA IOUT = 100mA IOUT = 50mA IOUT = 1mA
1 en (V/Hz)
1
0.1 VOUT = 1.5V VIN = 2.5V IOUT = 1mA CIN = 1F COUT = 1F TJ = 25C 0.1 1 f (kHz) 10 100 1000
0.1 VOUT = 1.5V VIN = 2.5V CIN = 1F CBYP = 10nF COUT = 1F TJ = 25C 0.1 1 f (kHz) 10 100 1000
0.01
0.01
0.001 0.01
0.001 0.01
Power Supply Rejection Ratio vs. Frequency vs. Output Voltage, CBYP = 10nF
80 70 60 PSRR (dB) Top to bottom: VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 2.8V VOUT = 3.0V VOUT = 3.3V PSRR (dB) 50 40 30 20 10 VIN = VOUT + 1V CIN = COUT = 1F CBYP = 10nF IOUT = 1mA TJ = 25C 0.1
Power Supply Rejection Ratio vs. Frequency vs. Output Voltage, CBYP = 100nF
80 70 60 50 40 30 20 10 VIN = VOUT + 1V CIN = COUT = 1F CBYP = 100nF IOUT = 1mA TJ = 25C 0.1 Top to bottom: VOUT = 1.5V VOUT = 2.5V VOUT = 1.8V VOUT = 2.8V VOUT = 3.0V VOUT = 3.3V
0 0.01
1 f (kHz)
10
100
1000
0 0.01
1 f (kHz)
10
100
1000
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SC1453
POWER MANAGEMENT Evaluation Board Schematic
J1 RIPPLE MON J2 IN MON J3 IN
1 C1 C2 R4 3
U1 IN EN GND 2
SC1453 OUT BYP
5 R1 4 C3 C4 R2 R3
J4 OUT MON
J5 EN J8 1 2 3 EN
J6 1 2 IQ MON C5 J7 FLG
J10 GND
J11 GND
J12 GND
J13 GND
J14 GND
J15 GND
J9 LOAD DRV J16 1 2 3 LOAD DRV EN 1 2 3 4
Q1 S S S G Si4410 D D D D 8 7 6 5
Evaluation Board Bill of Materials
Quantity 2 2 1 1 3 1 1 1 2 1 6 1 2 1 1 1
2006 Semtech Corp.
Reference C 1, C 4 C 2, C 3 C5 J1 J2 - J4 J5 J6 J7 J8 , J1 6 J9 J1 0 - J1 5 Q1 R1, R2 R3 R4 U1
Part/Description Not placed 1F ceramic 10nF ceramic BNC socket Test pin Test pin Header, 2 pin Not placed Header, 3 pin Test pin Test pin S i 4410 Not placed See next page 10k, 1/10W SC1453ISK-X.X or SC1453ITSK-XX
11
Vendor
Notes
Murata Various Various Various Various Various
GRM42-6X7R105K10
VOUT ripple monitor Red White
Various Various Various Vishay Orange Black (J14 not placed)
Various Various Semtech
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SC1453
POWER MANAGEMENT Evaluation Board Gerber Plots
Top Copper
Bottom Copper
Output Voltage Option (V) 1.5 1.8 2.5 2.6 2.7 2.8 2.85 2.9 R3 Value/Siz e 10/0.5W 12/0.5W 16/0.5W 16/0.5W 18/0.5W 18/0.5W 18/0.5W 18/0.5W 20/0.5W 20/0.5W 22/0.5W 22/0.5W
Top Silk Screen
3.0 3.1 3.2 3.3
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SC1453
POWER MANAGEMENT Outline Drawing - SOT-23-5
A e1 N
EI
D
DIMENSIONS MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX
A A1 A2 b c D E1 E e e1 L L1 N 01 aaa bbb ccc A H .035 .000 .035 .010 .003 .110 .060 .045 .057 .006 .051 .020 .009 .118 .069 0.90 0.00 .90 0.25 0.08 2.80 1.50 1.15 1.45 0.15 1.30 0.50 0.22 3.00 1.75
2X E/2
E
1 ccc C
2X N/2 TIPS
2
e B D
aaa C
A2 SEATING PLANE
.114 .063 .110 BSC .037 BSC .075 BSC .012 .018 .024 (.024) 5 0 10 .004 .008 .008
2.90 1.60 2.80 BSC 0.95 BSC 1.90 BSC 0.30 0.45 0.60 (0.60) 5 0 10 0.10 0.20 0.20
C
A1 bxN
bbb
C A-B D
GAGE PLANE 0.25 L (L1)
c
01
SEE DETAIL SIDE VIEW
A
DETAIL
A
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
Land Pattern - SOT-23-5
X
DIM
(C) G Y P Z C G P X Y Z
DIMENSIONS MILLIMETERS INCHES
(.098) .055 .037 .024 .043 .141 (2.50) 1.40 0.95 0.60 1.10 3.60
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
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SC1453
POWER MANAGEMENT Outline Drawing - TSOT-23-5
A e1 N E1 1 ccc C 2X N/2 TIPS B D aaa C A2 SEATING PLANE C A1 bxN bbb C A-B D GAGE PLANE 0.25 L (L1) DETAIL SEE DETAIL SIDE VIEW
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-193, VARIATION AB.
DIM
D
A A1 A2 b c D E1 E e e1 L L1 N 01 aaa bbb ccc
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.000 .028 .012 .003 .110 .060 .039 .004 .035 .020 .008 .118 .067 0.00 0.70 0.30 0.08 2.80 1.50 1.00 0.10 0.90 0.50 0.20 3.00 1.70
2X E/2
E
2
e
.114 .063 .110 BSC .037 BSC .075 BSC .012 .018 .024 (.024) 5 0 8 .004 .008 .010
2.90 1.60 2.80 BSC 0.95 BSC 1.90 BSC 0.30 0.45 0.60 (0.60) 5 0 8 0.10 0.20 0.25
A H c
01
A
A
Land Pattern - TSOT-23-5
X
DIM
(C) G Y P Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.087) .031 .037 .024 .055 .141 (2.20) 0.80 0.95 0.60 1.40 3.60
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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